In the circuit shown below, $V_1$ and $V_2$ are bias voltages. Based on input and output impedances, the circuit behaves as a
For a MOS capacitor, $V_{fb}$ and $V_t$ are the flat-band voltage and the threshold voltage, respectively. The variation of the depletion width ($W_{\text{dep}}$) for varying gate voltage ($V_g$) is best represented by