In the circuit diagram shown below, NMOS is in saturation region, \( \mu_n C_{\text{ox}} = 200 \, \mu \text{A/V}^2 \), width \( W = 40 \, \mu \text{m} \), length \( L = 1 \, \mu \text{m} \), the threshold voltage is 0.4 V, and the ratio of body-effect transconductance (\( g_m b \)) to transconductance (\( g_m \)) is 0.1. A small input voltage \( v_{\text{in}} \) is applied at the bulk-terminal to produce a small change in the output voltage \( v_{\text{out}} \). The dc gain for \( v_{\text{out}} / v_{\text{in}} \) is \(\underline{\hspace{2cm}}\). (Neglect channel-length modulation for NMOS and all intrinsic capacitors.)
