Using Boolean logic, an AND gate can be constructed by combining NAND gates as follows: \[ {AND}(A,B) = {NAND}({NAND}(A,B), {NAND}(A,B)) \] This means the output of a NAND gate is fed into another NAND gate acting as an inverter, which results in AND operation.
The second circuit (Option B) shows this correct configuration.

Match the LIST-I with LIST-II
| LIST-I (Logic Gates) | LIST-II (Expressions) | ||
|---|---|---|---|
| A. | EX-OR | I. | \( A\bar{B} + \bar{A}B \) |
| B. | NAND | II. | \( A + B \) |
| C. | OR | III. | \( AB \) |
| D. | EX-NOR | IV. | \( \bar{A}\bar{B} + AB \) |
Choose the correct answer from the options given below:
Match List-I with List-II:
| List-I (Counters) | List-II (Delay/Number of States) |
|---|---|
| (A) n-bit ring counter | (I) Number of states is \( 2^n \) |
| (B) MOD-\(2^n\) asynchronous counter | (II) Fastest counter |
| (C) n-bit Johnson counter | (III) Number of used states is \( n \) |
| (D) Synchronous counter | (IV) Number of used states is \( 2n \) |
Choose the correct answer from the options given below: