List of top Computer Organization and Architecture Questions asked in GATE CS

Given a pipeline with 5 stages, the delay for each stage is as follows:

\[ \begin{array}{|c|c|} \hline \textbf{Stage} & \textbf{Delay (ns)} \\ \hline 1 & 250 \\ 2 & 150 \\ 3 & 100 \\ 4 & 200 \\ 5 & 50 \\ \hline \end{array} \]

The buffer delay is 10 ns. Find the time for \( n = 1000 \) instructions.

A processor uses a 32-bit instruction format and supports byte-addressable memory access. The ISA of the processor has 150 distinct instructions. The instructions are equally divided into two types, namely R-type and I-type, whose formats are shown below. R-type Instruction Format: \begin{center} \setlength{\tabcolsep}{15pt} % Adjust column spacing \renewcommand{\arraystretch}{1.5} % Adjust row spacing \begin{tabular}{|c|c|c|c|c|} \hline OPCODE & UNUSED & DST Register & SRC Register1 & SRC Register2
\hline \end{tabular} \end{center} \vspace{0.5cm} I-type Instruction Format: \begin{center} \setlength{\tabcolsep}{15pt} % Adjust column spacing \renewcommand{\arraystretch}{1.5} % Adjust row spacing \begin{tabular}{|c|c|c|c|} \hline OPCODE & DST Register & SRC Register & \# Immediate Value/Address
\hline \end{tabular} \end{center} In the OPCODE, 1 bit is used to distinguish between I-type and R-type instructions, and the remaining bits indicate the operation. The processor has 50 architectural registers, and all register fields in the instructions are of equal size. Let \(X\) be the number of bits used to encode the UNUSED field, \(Y\) be the number of bits used to encode the OPCODE field, and \(Z\) be the number of bits used to encode the immediate value/address field. The value of \(X + 2Y + Z\) is ............

An instruction format has the following structure: \begin{center} Instruction Number: Opcode destination reg, source reg-1, source reg-2} \end{center} Consider the following sequence of instructions to be executed in a pipelined processor: I\(_1\): DIV R3, R1, R2
I\(_2\): SUB R5, R3, R4
I\(_3\): ADD R3, R5, R6
I\(_4\): MUL R7, R3, R8 Which of the following statements is/are TRUE?

Which of the following statements is/are FALSE?}

Node X has a TCP connection open to node Y. The packets from X to Y go through an intermediate IP router R. Ethernet switch S is the first switch on the network path between X and R. Consider a packet sent from X to Y over this connection. Which of the following statements is/are TRUE about the destination IP and MAC addresses on this packet at the time it leaves X?

The format of a single-precision floating-point number as per the IEEE 754 standard is:} \begin{center} \begin{tabular}{|c|c|c|} \hline Sign (1 bit) & Exponent (8 bits) & Mantissa (23 bits)
\hline \end{tabular} \end{center} Choose the largest floating-point number among the following options:

Let \( T(n) \) be the recurrence relation defined as follows: \[ T(0) = 1, \quad T(1) = 2, \quad T(n) = 5T(n-1) - 6T(n-2) \quad \text{for } n \geq 2 \] Which one of the following statements is TRUE?

Instruction format has the following structure.Instruction number OPCODE destination Source \(1\) and Source \(2\).
\(I_1:\) Div \(R_3 R_1 R_2;\)
\(I_2:\) Sub \(R_5 R_3 R_4;\)
\(I_3:\) Add \(R_3 R_5 R_6;\)
\(I_4:\) Mul \(R_7 R_3 R_8;\)