The electrical system shown in the figure converts input source current \( i_s(t) \) to output voltage \( v_o(t) \). 
\[ \text{Current } i_L(t) \text{ in the inductor and voltage } v_C(t) \text{ across the capacitor are taken as the state variables, both assumed to be initially equal to zero, i.e., } i_L(0) = 0 \text{ and } v_C(0) = 0. \text{ The system is} \]
The electrical system shown in the figure converts input source current \( i_s(t) \) to output voltage \( v_o(t) \). \[ \text{Current } i_L(t) \text{ in the inductor and voltage } v_C(t) \text{ across the capacitor are taken as the state variables, both assumed to be initially equal to zero, i.e., } i_L(0) = 0 \text{ and } v_C(0) = 0. \text{ The system is} \]
Show Hint
- completely state controllable as well as completely observable
- completely state controllable but not observable
- completely observable but not state controllable
- neither state controllable nor observable
The Correct Option is D
Solution and Explanation
In this electrical system, the state variables are \( i_L(t) \) and \( v_C(t) \). The system's behavior involves an inductor and a capacitor, which are coupled, and the input and output are related in a way that does not allow both complete state controllability and observability. Analyzing the system’s dynamics, we find that the system is neither completely state controllable nor observable because there is not enough independent information to control both state variables or observe them fully from the output.
Step 1: For a system to be state controllable, the controllability matrix must be full rank, and for observability, the observability matrix must also be full rank. In this case, due to the system's structure and coupling between the inductor and capacitor, neither condition is satisfied.
Step 2: Hence, the correct answer is option (D), "neither state controllable nor observable."
Final Answer: (D) neither state controllable nor observable
Top Questions on Control Systems
- For a stable linear time-invariant system, the location of all poles must be:
- GATE IN - 2026
- Control Systems
- Control Systems
Consider the unity-negative-feedback system shown in Figure (i) below, where gain \( K \geq 0 \). The root locus of this system is shown in Figure (ii) below.
For what value(s) of \( K \) will the system in Figure (i) have a pole at \( -1 + j1 \)?
- GATE EC - 2025
- Control Systems
- Control Systems
- Which of the following best describes the phase and sinusoidal components in the given control system plot?
- GATE EC - 2025
- Control Systems
- Control Systems
- Let \( x[n] \) be a discrete-time signal whose \( z \)-transform is \( X(z) \). Which of the following statements is/are TRUE?
- GATE EC - 2025
- Control Systems
- Control Systems
Consider a message signal \( m(t) \) which is bandlimited to \( [-W, W] \), where \( W \) is in Hz. Consider the following two modulation schemes for the message signal:
• Double sideband-suppressed carrier (DSB-SC): \[ f_{DSB}(t) = A_c m(t) \cos(2\pi f_c t) \] • Amplitude modulation (AM): \[ f_{AM}(t) = A_c \left( 1 + \mu m(t) \right) \cos(2\pi f_c t) \] Here, \( A_c \) and \( f_c \) are the amplitude and frequency (in Hz) of the carrier, respectively. In the case of AM, \( \mu \) denotes the modulation index. Consider the following statements:
(i) An envelope detector can be used for demodulation in the DSB-SC scheme if \( m(t)>0 \) for all \( t \).
(ii) An envelope detector can be used for demodulation in the AM scheme only if \( m(t)>0 \) for all \( t \).
Which of the following options is/are correct?- GATE EC - 2025
- Control Systems
- Control Systems
Questions Asked in GATE EC exam
Eight students (P, Q, R, S, T, U, V, and W) are playing musical chairs. The figure indicates their order of position at the start of the game. They play the game by moving forward in a circle in the clockwise direction.
After the 1st round, the 4th student behind P leaves the game.
After the 2nd round, the 5th student behind Q leaves the game.
After the 3rd round, the 3rd student behind V leaves the game.
After the 4th round, the 4th student behind U leaves the game.
Who all are left in the game after the 4th round?
- A full adder and an XOR gate are used to design a digital circuit with inputs \( X, Y, Z \), and output \( F \), as shown below. The input \( Z \) is connected to the carry-in input of the full adder.
If the input \( Z \) is set to logic ‘1’, then the circuit functions as _________ with \( X \) and \( Y \) as inputs.- GATE EC - 2025
- Digital Circuits
Consider a system represented by the block diagram shown below. Which of the following signal flow graphs represent(s) this system? Choose the correct option(s).
- GATE EC - 2025
- Fourier series
- Consider a non-negative function \( f(x) \) which is continuous and bounded over the interval [2, 8]. Let \( M \) and \( m \) denote, respectively, the maximum and the minimum values of \( f(x) \) over the interval. Among the combinations of \( \alpha \) and \( \beta \) given below, choose the one(s) for which the inequality \[ \beta \leq \int_2^8 f(x) \, dx \leq \alpha \] is guaranteed to hold.
- GATE EC - 2025
- Calculus
The following figures show three curves generated using an iterative algorithm. The total length of the curve generated after 'Iteration n' is:
