A full adder is a digital circuit that adds two binary digits and a carry-in. However, in this circuit, \( Z \) is connected to the carry-in input and is set to logic ‘1’. This configuration will cause the circuit to subtract \( Y \) from \( X \).
Here's why:
The XOR gate is used to perform a subtraction operation in digital circuits, where the input \( X \) and \( Y \) are processed with the logic ‘1’ carry-in (i.e., the full adder behaves like a subtractor with the carry-in being ‘1’).
In this case, \( X \) and \( Y \) will be subtracted, producing the desired difference.
Thus, the overall circuit functions as a subtractor when \( Z \) is set to ‘1’. Hence, the correct answer is (B).
The value of current \( I \) in the electrical circuit as given below, when the potential at \( A \) is equal to the potential at \( B \), will be _____ A.
In the circuit shown, assuming the threshold voltage of the diode is negligibly small, then the voltage \( V_{AB} \) is correctly represented by:
Two resistors are connected in a circuit loop of area 5 m\(^2\), as shown in the figure below. The circuit loop is placed on the \( x-y \) plane. When a time-varying magnetic flux, with flux-density \( B(t) = 0.5t \) (in Tesla), is applied along the positive \( z \)-axis, the magnitude of current \( I \) (in Amperes, rounded off to two decimal places) in the loop is (answer in Amperes).
A 50 \(\Omega\) lossless transmission line is terminated with a load \( Z_L = (50 - j75) \, \Omega.\) { If the average incident power on the line is 10 mW, then the average power delivered to the load
(in mW, rounded off to one decimal place) is} _________.
In the circuit shown below, the AND gate has a propagation delay of 1 ns. The edge-triggered flip-flops have a set-up time of 2 ns, a hold-time of 0 ns, and a clock-to-Q delay of 2 ns. The maximum clock frequency (in MHz, rounded off to the nearest integer) such that there are no setup violations is (answer in MHz).
The diode in the circuit shown below is ideal. The input voltage (in Volts) is given by \[ V_I = 10 \sin(100\pi t), \quad {where time} \, t \, {is in seconds.} \] The time duration (in ms, rounded off to two decimal places) for which the diode is forward biased during one period of the input is (answer in ms).