Question:

In a given sequential circuit, initial states are $Q_1 = 1$ and $Q_2 = 0$. For a clock frequency of 1 MHz, the frequency of signal $Q_2$ in kHz, is ___________ (rounded off to the nearest integer). 

 

Show Hint

For any synchronous sequential circuit, the best way to determine the output frequency is to create a state table and trace the sequence of states and outputs. The number of states in the repeating cycle determines the period of the output signal in terms of clock cycles.
Updated On: Feb 7, 2026
Hide Solution
collegedunia
Verified By Collegedunia

Correct Answer: 250

Solution and Explanation

Let's analyze the sequential circuit. It consists of two D flip-flops. The inputs to the flip-flops are: $D_1 = \overline{Q_2}$ $D_2 = Q_1$
The state of the circuit at the next clock edge, $(Q_1^+, Q_2^+)$, is determined by the current inputs $(D_1, D_2)$. $Q_1^+ = D_1 = \overline{Q_2}$ $Q_2^+ = D_2 = Q_1$
Let's trace the state sequence starting from the initial state $(Q_1, Q_2) = (1, 0)$.
- State 0 (Initial): $(Q_1, Q_2) = (1, 0)$. - State 1 (After 1st clock edge): $Q_1^+ = \overline{Q_2} = \overline{0} = 1$. $Q_2^+ = Q_1 = 1$. The new state is $(1, 1)$. - State 2 (After 2nd clock edge): $Q_1^+ = \overline{Q_2} = \overline{1} = 0$. $Q_2^+ = Q_1 = 1$. The new state is $(0, 1)$. - State 3 (After 3rd clock edge): $Q_1^+ = \overline{Q_2} = \overline{1} = 0$. $Q_2^+ = Q_1 = 0$. The new state is $(0, 0)$. - State 4 (After 4th clock edge): $Q_1^+ = \overline{Q_2} = \overline{0} = 1$. $Q_2^+ = Q_1 = 0$. The new state is $(1, 0)$, which is the initial state.
The circuit is a state machine that cycles through 4 distinct states: $(1,0) \to (1,1) \to (0,1) \to (0,0) \to (1,0) \dots$
The sequence of the output $Q_2$ is: $0 \to 1 \to 1 \to 0 \to 0 \dots$ This sequence $0, 1, 1, 0$ repeats every 4 clock cycles.
The period of the signal $Q_2$ is 4 times the clock period. $T_{Q2} = 4 \times T_{CLK}$.
The frequency of $Q_2$ is related to the clock frequency by: $f_{Q2} = \frac{1}{T_{Q2}} = \frac{1}{4 \times T_{CLK}} = \frac{f_{CLK}}{4}$.
Given the clock frequency $f_{CLK} = 1$ MHz = 1000 kHz.
$f_{Q2} = \frac{1000 \text{ kHz}}{4} = 250$ kHz.
The frequency of signal $Q_2$ is 250 kHz.
Was this answer helpful?
0
0

Questions Asked in GATE EC exam

View More Questions