List of top Digital Circuits Questions asked in GATE Electronics and Communication Engineering

An NMOS transistor operating in the linear region has \(I_{DS} = 5 \, \mu{A}\) at \(V_{DS} = 0.1 \, {V}\). Keeping \(V_{GS}\) constant, the \(V_{DS}\) is increased to \(1.5 \, {V}\). Given that: \[ \mu_n C_{ox} \frac{W}{L} = 50 \, \mu{A}/{V}^2, \] the transconductance at the new operating point (in \(\mu{A}/{V}\), rounded off to two decimal places) is \(\_\_\_\_\).

A lossless transmission line with characteristic impedance \(Z_0 = 50 \, \Omega\) is terminated with an unknown load. The magnitude of the reflection coefficient is \(|\Gamma| = 0.6\). As one moves towards the generator from the load, the maximum value of the input impedance magnitude looking towards the load (in \(\Omega\)) is \(\_\_\_\_\).

In the circuit shown below, the transistors \(M_1\) and \(M_2\) are biased in saturation. Their small signal transconductances are \(g_{m1}\) and \(g_{m2}\), respectively. Neglect body effect, channel length modulation, and intrinsic device capacitances. \begin{center} \includegraphics[width=6cm]{51.png} \end{center} Assuming that capacitor \(C_1\) is a short circuit for AC analysis, the exact magnitude of small signal voltage gain \(\left|\frac{v_{{out}}}{v_{{in}}}\right|\) is \(\_\_\_\_\).

The sequence of states (\(Q_1 Q_0\)) of the given synchronous sequential circuit is \(\_\_\_\_\). \begin{center} \includegraphics[width=10cm]{42.png} \end{center}

The free electron concentration profile \(n(x)\) in a doped semiconductor at equilibrium is shown in the figure, where the points A, B, and C mark three different positions. Which of the following statements is/are true? \begin{center} \includegraphics[width=8cm]{26.png} \end{center}