When the switch $S_2$ is closed, the gain of the programmable gain amplifier shown in the following figure is:
The op-amp and the 1 mA current source in the circuit of figure are ideal. The output of the op-amp is:
For the op-amp circuit shown in the figure below, $V_o$ is:
If the op-amp in figure is ideal, the output voltage Vout will be equal to:
When the input to Q is a 1 level, the frequency of oscillations of the timer circuit is _______.
The logic circuit given below converts a binary code \(Y_1, Y_2, Y_3\) into _______.
The bus admittance matrix of the network shown in the given figure, for which the marked parameters are per unit impedance, is _______.