Step 1: Identify the logic gates used in the circuit.
From the diagram, the upper gate connected to input \( A \) is an AND gate with both inputs same, hence its output is
\[
A \cdot A = A
\]
The lower left gate is a NAND gate with inputs \( A \) and \( B \), producing output
\[
(A \cdot B)'
\]
Step 2: Analyze the middle gate.
The output of the NAND gate is fed into an AND gate whose both inputs are the same, so its output remains
\[
(A \cdot B)'
\]
Step 3: Write expression for final output.
The final gate is an AND gate combining the two signals, hence
\[
Y = A \cdot (A \cdot B)'
\]
Step 4: Simplify the Boolean expression.
Using Boolean algebra,
\[
(A \cdot B)' = A' + B'
\]
\[
Y = A(A' + B') = AA' + AB' = AB'
\]
Step 5: Construct the truth table from the expression \( Y = AB' \).
\[
\begin{array}{|c|c|c|}
\hline
A & B & Y \\
\hline
0 & 0 & 0 \\
0 & 1 & 0 \\
1 & 0 & 1 \\
1 & 1 & 0 \\
\hline
\end{array}
\]
This matches exactly with Option (B).