Step 1: Option (A) is correct because 15 comparators are required for a 4-bit Flash ADC.
Step 2: Option (B) is incorrect because the ADC requires more than just a 4 to 2 encoder. It needs a large priority encoder depending on the number of comparators.
Step 3: Option (C) is incorrect because a change in \( \frac{V}{16} \) would affect the LSB, not the MSB.
Step 4: Option (D) is correct because a change in \( \frac{V}{16} \) affects the least significant bit (LSB) of the output.
Thus, the correct answers are (A) and (D).
Final Answer:
(A) The ADC requires 15 comparators, (D) A change in the input voltage by \( \frac{V}{16} \) will always flip the LSB of the output.
A 4-bit weighted-resistor DAC with inputs \( b_3, b_2, b_1, \) and \( b_0 \) (MSB to LSB) is designed using an ideal opamp, as shown below. The switches are closed when the corresponding input bits are logic ‘1’ and open otherwise. When the input \( b_3b_2b_1b_0 \) changes from 1110 to 1101, the magnitude of the change in the output voltage \( V_o \) (in mV, rounded off to the nearest integer) is _________.

The \( Z \)-parameter matrix of a two-port network relates the port voltages and port currents as follows: \[ \begin{bmatrix} V_1 \\ V_2 \end{bmatrix} = Z \begin{bmatrix} I_1 \\ I_2 \end{bmatrix} \] The \( Z \)-parameter matrix (with each entry in Ohms) of the network shown below is _________.

Let \( G(s) = \frac{1}{10s^2} \) be the transfer function of a second-order system. A controller \( M(s) \) is connected to the system \( G(s) \) in the configuration shown below.
Consider the following statements.
Which one of the following options is correct?



