List of top Digital Electronics Questions asked in GATE Instrumentation Engineering

The 4-bit signed 2’s complement form of \( (-5)_{10} + (-5)_{10} \) is:

A dual-slope ADC has a fixed integration time of 100 ms. The reference voltage of the ADC is \(-5 \, {V}\). The time taken by the ADC to measure an input voltage of \(1.25 \, {V}\) is ________ ms (rounded off to the nearest integer).

For the given digital circuit, $A=B=1$. Assume that AND, OR, and NOT gates have propagation delays of $10$ ns, $10$ ns, and $5$ ns respectively (wires have zero delay). Given that $C=1$ at turn–on, the frequency of steady–state oscillation of the output $Y$ is _____.

In the circuit shown, the initial binary content of shift register A is $1101$ and that of shift register B is $1010$. The shift registers are positive–edge triggered, and the gates have no delay. When the shift control is high, what will be the binary content of the shift registers A and B after four clock pulses?

The simplified form of the Boolean function $F(W,X,Y,Z)=\Sigma(4,5,10,11,12,13,14,15)$ with the minimum number of terms and literals is _____

Choose the fastest logic family among the following:

The table shows the present state $Q(t)$, next state $Q(t{+}1)$, and a single control input for a flip-flop. Identify the flip-flop.

Match the Exclusive-OR (XOR) operations (i)–(iv) with the results (p)–(s), where $X$ is a Boolean input.