List of top Digital Electronics Questions asked in GATE IN

In the circuit shown, the switch is initially closed. It is opened at \( t = 0 \, \text{s} \) and remains open thereafter. The time (in milliseconds) at which the output voltage \( V_{\text{out}} \) becomes LOW is _________ (round off to three decimal places).
A = \( a_1a_0 \) and B = \( b_1b_0 \) are two 2-bit unsigned binary numbers. If \( F(a_1, a_0, b_1, b_0) \) is a Boolean function such that \( F = 1 \) only when \( A>B \), and \( F = 0 \) otherwise, then \( F \) can be minimized to the form _________
The digital circuit shown _________
The logic block shown has an output \( F \) given by _________
The output F of the digital circuit shown can be written in the form _________

A Boolean function \( F \) of three variables \( X \), \( Y \), and \( Z \) is given as \[ F(X, Y, Z) = (X' + Y + Z) \cdot (X + Y' + Z') \cdot (X' + Y + Z') \cdot (X' Y' Z' + X Y Z') \] Which one of the following is true?

Given below is the diagram of a synchronous sequential circuit with one J-K flip-flop and one T flip-flop with their outputs denoted as A and B respectively, with \( J_A = (A' + B') \), \( K_A = (A + B) \), and \( T_B = A \). Starting from the initial state \( AB = 00 \), the sequence of states \( (AB) \) visited by the circuit is 
 

A 4 \(\times\) 1 multiplexer with two selector lines is used to realize a Boolean function \( F \) having four Boolean variables X, Y, Z and W as shown below. \( S_0 \) and \( S_1 \) denote the least significant bit (LSB) and most significant bit (MSB) of the selector lines of the multiplexer respectively. \( I_0, I_1, I_2, I_3 \) are the input lines of the multiplexer. 

The canonical sum of product representation of F is 
 

A 10-bit ADC has a full-scale of 10.230 V, when the digital output is \( (11 \, 1111 \, 1111)_2 \). The quantization error of the ADC in millivolt is \(\underline{\hspace{2cm}}\).
A 16-bit microprocessor has twenty address lines (A0 to A19) and 16 data lines. The higher eight significant lines of the data bus of the processor are tied to the 8-data lines of a 16 Kbyte memory that can store one byte in each of its 16K address locations. The memory chip should map onto contiguous memory locations and occupy only 16 Kbyte of memory space. Which of the following statement(s) is/are correct with respect to the above design?
For a 4-bit Flash type Analog to Digital Converter (ADC) with full scale input voltage range "V", which of the following statement(s) is/are true?