Consider the following logic circuit.
The output is Y = 0 when :
To determine when the output \( Y = 0 \) for the given logic circuit, let's analyze the circuit step-by-step.
Let's analyze the circuit logic:
We need to determine when \( Y = 0 \):
Examining the options, we find:
A = 1 and B = 1
Step 1: Analyze the logic circuit and identify the gates.
The circuit consists of an AND gate, a NOT gate, an OR gate, and a final NAND gate.
Step 2: Write the Boolean expression for the output of each gate.
Let the output of the AND gate be \( X \), the output of the NOT gate be \( \bar{B} \), and the output of the OR gate be \( Z \).
The final output is \( Y \). \[ X = A \cdot B \] \[ \bar{B} = \text{NOT}(B) \] \[ Z = A + \bar{B} \] The final output \( Y \) is the NAND of \( X \) and \( Z \): \[ Y = \overline{X \cdot Z} = \overline{(A \cdot B) \cdot (A + \bar{B})} \]
Step 3: Evaluate the output \( Y \) for each given input combination.
Case 1: A = 1 and B = 1
\[ X = 1 \cdot 1 = 1 \] \[ \bar{B} = \text{NOT}(1) = 0 \] \[ Z = 1 + 0 = 1 \] \[ Y = \overline{1 \cdot 1} = \overline{1} = 0 \] So, \( Y = 0 \) when \( A = 1 \) and \( B = 1 \).
Case 2: A = 0 and B = 1
\[ X = 0 \cdot 1 = 0 \] \[ \bar{B} = \text{NOT}(1) = 0 \] \[ Z = 0 + 0 = 0 \] \[ Y = \overline{0 \cdot 0} = \overline{0} = 1 \] So, \( Y = 1 \) when \( A = 0 \) and \( B = 1 \).
Case 3: A = 1 and B = 0
\[ X = 1 \cdot 0 = 0 \] \[ \bar{B} = \text{NOT}(0) = 1 \] \[ Z = 1 + 1 = 1 \] \[ Y = \overline{0 \cdot 1} = \overline{0} = 1 \] So, \( Y = 1 \) when \( A = 1 \) and \( B = 0 \).
Case 4: A = 0 and B = 0
\[ X = 0 \cdot 0 = 0 \] \[ \bar{B} = \text{NOT}(0) = 1 \] \[ Z = 0 + 1 = 1 \] \[ Y = \overline{0 \cdot 1} = \overline{0} = 1 \] So, \( Y = 1 \) when \( A = 0 \) and \( B = 0 \).
Step 4: Identify the input combination for which \( Y = 0 \).
From the evaluations above, the output \( Y = 0 \) only when \( A = 1 \) and \( B = 1 \).

To obtain the given truth table, the following logic gate should be placed at G:
Which of the following circuits has the same output as that of the given circuit?


For a given reaction \( R \rightarrow P \), \( t_{1/2} \) is related to \([A_0]\) as given in the table. Given: \( \log 2 = 0.30 \). Which of the following is true?
| \([A]\) (mol/L) | \(t_{1/2}\) (min) |
|---|---|
| 0.100 | 200 |
| 0.025 | 100 |
A. The order of the reaction is \( \frac{1}{2} \).
B. If \( [A_0] \) is 1 M, then \( t_{1/2} \) is \( 200/\sqrt{10} \) min.
C. The order of the reaction changes to 1 if the concentration of reactant changes from 0.100 M to 0.500 M.
D. \( t_{1/2} \) is 800 min for \( [A_0] = 1.6 \) M.