All the diodes in the circuit given below are ideal. Which of the following plots is/are correct when \( V_I \) (in Volts) is swept from \( -M \) to \( M \)?
In the given circuit with ideal diodes, the current-voltage relationship will change depending on the input voltage (\(V_I\)). The behavior of the circuit can be broken down into the following steps:
Step 1: Diode behavior when \(V_I\) is negative
When \(V_I\) is negative, the diodes will be reverse biased and no current will flow through the circuit. Therefore, the output voltage \(V_o\) will be 0 for negative \(V_I\), and the plot will be flat from \(-M\) to 0.
Step 2: Diode behavior when \(V_I\) is positive
When \(V_I\) is positive, the diodes will conduct and the output voltage will increase linearly with \(V_I\). This results in a linear relationship between \(V_o\) and \(V_I\) for positive \(V_I\). The correct plot is (A) for the output voltage and (D) for the current \(I_I\) in the circuit, where the current increases as \(V_I\) increases.
The diode in the circuit shown below is ideal. The input voltage (in Volts) is given by \[ V_I = 10 \sin(100\pi t), \quad {where time} \, t \, {is in seconds.} \] The time duration (in ms, rounded off to two decimal places) for which the diode is forward biased during one period of the input is (answer in ms).
Two fair dice (with faces labeled 1, 2, 3, 4, 5, and 6) are rolled. Let the random variable \( X \) denote the sum of the outcomes obtained. The expectation of \( X \) is _________ (rounded off to two decimal places).
Two resistors are connected in a circuit loop of area 5 m\(^2\), as shown in the figure below. The circuit loop is placed on the \( x-y \) plane. When a time-varying magnetic flux, with flux-density \( B(t) = 0.5t \) (in Tesla), is applied along the positive \( z \)-axis, the magnitude of current \( I \) (in Amperes, rounded off to two decimal places) in the loop is (answer in Amperes).
A 50 \(\Omega\) lossless transmission line is terminated with a load \( Z_L = (50 - j75) \, \Omega.\) { If the average incident power on the line is 10 mW, then the average power delivered to the load
(in mW, rounded off to one decimal place) is} _________.
In the circuit shown below, the AND gate has a propagation delay of 1 ns. The edge-triggered flip-flops have a set-up time of 2 ns, a hold-time of 0 ns, and a clock-to-Q delay of 2 ns. The maximum clock frequency (in MHz, rounded off to the nearest integer) such that there are no setup violations is (answer in MHz).
Consider a system represented by the block diagram shown below. Which of the following signal flow graphs represent(s) this system? Choose the correct option(s).