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GATE EC
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Analog Electronics
List of top Analog Electronics Questions asked in GATE EC
For the circuit shown with an ideal long-channel nMOSFET biased in saturation, $v_A$ and $v_B$ are the small-signal voltages at nodes A and B. The value of $\dfrac{v_A}{v_B}$ is ____________ (rounded off to one decimal place).
GATE EC - 2022
GATE EC
Analog Electronics
MOSFET
A circuit with a diode is shown. The ratio of the minimum to maximum small-signal voltage gain
\[ \frac{\partial V_{out}}{\partial V_{in}} \]
is to be found (rounded to two decimals).
GATE EC - 2022
GATE EC
Analog Electronics
Small signal analysis
The ideal long-channel nMOSFET and pMOSFET devices shown have threshold voltages of $1\text{ V}$ and $-1\text{ V}$, respectively. The MOSFET substrates are connected to their sources. Ignore leakage currents and assume that the capacitors are initially discharged. For the applied voltages as shown, the steady-state voltages are ________________.
GATE EC - 2022
GATE EC
Analog Electronics
MOSFET
Consider the CMOS circuit shown in the figure (substrates are connected to their respective sources). The gate width $(W)$ to gate length $(L)$ ratios of the transistors are as shown. Both the transistors have the same gate oxide capacitance per unit area. For the pMOSFET, the threshold voltage is $-1\ \text{V}$ and the mobility of holes is $40\ \text{cm}^2/(\text{V·s})$. For the nMOSFET, the threshold voltage is $1\ \text{V}$ and the mobility of electrons is $300\ \text{cm}^2/(\text{V·s})$. The steady state output voltage $V_O$ is ________________.
GATE EC - 2022
GATE EC
Analog Electronics
CMOS Process Flow