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Andhra Pradesh Post Graduate Engineering Common Entrance Test
List of top Questions asked in Andhra Pradesh Post Graduate Engineering Common Entrance Test
A function \( x(t) \) is said to have half-wave odd symmetry if
AP PGECET - 2024
AP PGECET
Electronics and Communication Engineering
Digital Signal Processing
The impulse response of a continuous time system is given by \( h(t) = \delta(t - 1) + \delta(t - 3) \). The value of the step response at \( t = 2 \) is
AP PGECET - 2024
AP PGECET
Electronics and Communication Engineering
Digital Signal Processing
The primary function of a clamper circuit is
AP PGECET - 2024
AP PGECET
Electronics and Communication Engineering
Digital Signal Processing
What are the conditions called which are required for a signal to fulfill to be represented as Fourier series?
AP PGECET - 2024
AP PGECET
Electronics and Communication Engineering
Fourier series
What is the period of the following signal, \( x(t) = \sin(18\pi t + 78^\circ) \)?
AP PGECET - 2024
AP PGECET
Electronics and Communication Engineering
Digital Signal Processing
A PAM signal can be detected by using
AP PGECET - 2024
AP PGECET
Electronics and Communication Engineering
Digital Signal Processing
For a square wave signal with a frequency of 10 KHz, calculate the output frequencies for Mod 2, Mod 4, and Mod 10 counters.
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AP PGECET
Electronics and Communication Engineering
Digital Counters
A 10-bit successive approximation type A/D converter has quantization error of 10 mV. The digital output corresponding to an analog input of 4.365 V would be
AP PGECET - 2024
AP PGECET
Electronics and Communication Engineering
Analog To Digital Converters
\( A + A.B + A.B.C + A.B.C.D \) simplifies to
AP PGECET - 2024
AP PGECET
Electronics and Communication Engineering
Boolean Algebra
The logic circuit shown in Figure below is a
AP PGECET - 2024
AP PGECET
Electronics and Communication Engineering
Logic gates
The logic function implemented by the circuit shown in the Figure below is (ground implies a logic '0')
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AP PGECET
Electronics and Communication Engineering
Logic gates
The minimum number of comparators required to build an eight-bit flash ADC is
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AP PGECET
Electronics and Communication Engineering
ADCs and DACs: Principles
The number of memory cycles required to execute the following 8085 instructions
I. STA 3000 H
II. LXI D, 3000 H
AP PGECET - 2024
AP PGECET
Electronics and Communication Engineering
Instruction Set of 8085
Which of the following circuit is used as a special signal to demultiplex the address bus and data bus?
AP PGECET - 2024
AP PGECET
Electronics and Communication Engineering
Bus Systems
Simplify the following expression with A, B, C three variables, \( F(A, B, C) = \Sigma(1, 3, 5, 7) \)
AP PGECET - 2024
AP PGECET
Electronics and Communication Engineering
Boolean Algebra
How to achieve 50\% duty cycle in adjustable rectangular wave generator? (Assume \( R_1 \) is Resistor connected between supply and discharge and \( R_2 \) is Resistor connected between discharge and trigger input.)
AP PGECET - 2024
AP PGECET
Electronics and Communication Engineering
IC 555 Timer
The decimal equivalent of \( (101111.1101)_2 \) is
AP PGECET - 2024
AP PGECET
Electronics and Communication Engineering
Number Systems
The number of memory cycles required to execute the 8085 instruction LDA 3000 H is
AP PGECET - 2024
AP PGECET
Electronics and Communication Engineering
Instruction Set of 8085
The POS form is suitable for circuits using
AP PGECET - 2024
AP PGECET
Electronics and Communication Engineering
Logic gates
An amplifier has \( A_v = 1000 \pm 100 \). Determine the feedback needed to keep the gain within \( \pm 10\% \).
AP PGECET - 2024
AP PGECET
Electronics and Communication Engineering
Amplifiers
If the input to a comparator is a sine wave, the output is
AP PGECET - 2024
AP PGECET
Electronics and Communication Engineering
Digital Signal Processing
A negative going trigger pulse is applied to pin 2 of the IC 555 timer, passes through the threshold level of
AP PGECET - 2024
AP PGECET
Electronics and Communication Engineering
IC 555 Timer
Three identical amplifiers with each one having a voltage gain of 50, input resistance of 1 kΩ and output resistance of 250 Ω are cascaded. The open circuit voltage gain of the combined amplifier is
AP PGECET - 2024
AP PGECET
Electronics and Communication Engineering
Amplifiers
Which of the following statements are true?
P: JFET is biased to operate it in active region
Q: MOSFET is biased to operate it in saturation region
AP PGECET - 2024
AP PGECET
Electronics and Communication Engineering
FET Amplifier
In the circuit shown in the following Figure, what is the output voltage (\( V_{out} \)) if a silicon transistor Q and an ideal op-amp are used?
AP PGECET - 2024
AP PGECET
Electronics and Communication Engineering
Op-Amp and Its Applications
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