In the circuit, \( I_{\text{DC}} \) is an ideal current source, the transistors \( M_1 \), \( M_2 \) are assumed to be biased in saturation wherein \( V_{\text{in}} \) is the input signal and \( V_{\text{DC}} \) is the fixed DC voltage. Both transistors have a small signal resistance of \( R_{ds} \) and transconductance of \( g_m \). The small signal output impedance of the circuit is:
In this circuit, the transistors \( M_1 \) and \( M_2 \) are biased in saturation. For small signal analysis, the output impedance of a transistor is influenced by both the drain-source resistance \( R_{ds} \) and the transconductance \( g_m \).
- Transistor in saturation: The small signal output impedance \( R_{\text{out}} \) can be approximated by the combination of the intrinsic resistance \( R_{ds} \) and the effect of the transconductance \( g_m \).
- Looking into the drain of \( M_2 \): The small signal output impedance is the parallel combination of \( R_{ds} \) and the impedance due to \( g_m \), which is given by \( \frac{1}{g_m} \).
Thus, the total small signal output impedance is: \[ R_{\text{out}} = R_{ds} + \frac{1}{g_m} \]
The op-amps in the following circuit are ideal. The voltage gain of the circuit is ……….. . (Round off to the nearest integer)
The maximum percentage error in the equivalent resistance of two parallel connected resistors of 100 ohm and 900 ohm, with each having a maximum 5% error, is:
A controller \( (1 + K_{DS}) \) is to be designed for the plant \[ G(s) = \frac{1000 \sqrt{2}}{s(s + 10)^2} \] The value of \( K_D \) that yields a phase margin of 45 degrees at the gain cross-over frequency of 10 rad/sec is ……… (round off to 1 decimal place).
Consider the state-space model:
\[ \dot{x}(t) = A x(t) + B u(t) \] \[ y(t) = C x(t) \] \[ A = \begin{bmatrix} 0 & 1 \\ -2 & -3 \end{bmatrix}, \quad B = \begin{bmatrix} 0 \\ 1 \end{bmatrix}, \quad C = \begin{bmatrix} 1 & 0 \end{bmatrix} \]The sum of the magnitudes of the poles is: