In the circuit, \( I_{\text{DC}} \) is an ideal current source, the transistors \( M_1 \), \( M_2 \) are assumed to be biased in saturation wherein \( V_{\text{in}} \) is the input signal and \( V_{\text{DC}} \) is the fixed DC voltage. Both transistors have a small signal resistance of \( R_{ds} \) and transconductance of \( g_m \). The small signal output impedance of the circuit is:
In this circuit, the transistors \( M_1 \) and \( M_2 \) are biased in saturation. For small signal analysis, the output impedance of a transistor is influenced by both the drain-source resistance \( R_{ds} \) and the transconductance \( g_m \).
- Transistor in saturation: The small signal output impedance \( R_{\text{out}} \) can be approximated by the combination of the intrinsic resistance \( R_{ds} \) and the effect of the transconductance \( g_m \).
- Looking into the drain of \( M_2 \): The small signal output impedance is the parallel combination of \( R_{ds} \) and the impedance due to \( g_m \), which is given by \( \frac{1}{g_m} \).
Thus, the total small signal output impedance is: \[ R_{\text{out}} = R_{ds} + \frac{1}{g_m} \]
In the given figure, EF and HJ are coded as 30 and 80, respectively. Which one among the given options is most appropriate for the entries marked (i) and (ii)?
An ideal low pass filter has frequency response given by \[ H(j\omega) = \begin{cases} 1, & |\omega| \leq 200\pi \\ 0, & \text{otherwise} \end{cases} \] Let \( h(t) \) be its time domain representation. Then h(0) = _________ (round off to the nearest integer).
A controller \( D(s) \) of the form \( (1 + K_D s) \) is to be designed for the plant \[ G(s) = \frac{1000\sqrt{2}}{s(s+10)^2} \] as shown in the figure. The value of \( K_D \) that yields a phase margin of \(45^\circ\) at the gain cross-over frequency of 10 rad/sec is __________ (round off to one decimal place).