Question

If three logic gates are connected as shown in the figure, then the correct truth table of the circuit is

 

• A.
• B.
• C.
• D.

Hint:

To determine the truth table for a combination of logic gates: 1. Identify each gate: Recognize AND, OR, NOT, NAND, NOR, XOR, XNOR gates. 2. Assign intermediate outputs: Label the output of each gate (e.g., \(Y_1, Y_2\)) before the final output. 3. Write Boolean expressions: Formulate the expression for each intermediate output and the final output. 4. Create a step-by-step truth table: List all possible input combinations. For each combination, calculate the output of the first gate, then the next, and so on, until you reach the final output. 5. Boolean Algebra Simplification: If possible, simplify the final Boolean expression using laws like absorption, De Morgan's theorems, etc., to verify your truth table.

Answer 1

The Correct Option is B

Step 1: Analyze the circuit and identify the logic gates.
The given circuit diagram shows three logic gates connected in series. Let's denote the inputs as A and B, and the final output as y.
1. First Gate: This is an AND gate. Its inputs are A and B. Let the output of this gate be \(Y_1\).
The Boolean expression for \(Y_1\) is:
\[ Y_1 = A \cdot B \quad \text{(A AND B)} \] 2. Second Gate: This is an OR gate. Its inputs are A and the output of the first gate (\(Y_1\)). Let the output of this gate be \(Y_2\).
The Boolean expression for \(Y_2\) is:
\[ Y_2 = A + Y_1 = A + (A \cdot B) \quad \text{(A OR (A AND B))} \] 3. Third Gate: This is a NOT gate (inverter). Its input is the output of the second gate (\(Y_2\)). Its output is the final output \(y\).
The Boolean expression for \(y\) is:
\[ y = \overline{Y_2} = \overline{A + (A \cdot B)} \quad \text{(NOT (A OR (A AND B)))} \] Step 2: Simplify the Boolean expression (optional but helpful for verification).
Using Boolean algebra, the expression \(A + (A \cdot B)\) can be simplified by the Absorption Law, which states that \(X + (X \cdot Y) = X\). In our case, \(X = A\) and \(Y = B\). So, \(Y_2 = A + (A \cdot B) = A\). Therefore, the final output \(y\) simplifies to:
\[ y = \overline{A} \] This means the entire circuit is equivalent to a NOT gate applied to input A.
Step 3: Construct the truth table based on the logical operations.
Let's systematically determine the output \(y\) for all possible combinations of inputs A and B: \[ \begin{array}{|c|c|c|c|c|} \hline A & B & Y_1 = A \cdot B & Y_2 = A + Y_1 & y = \overline{Y_2} \\ \hline 0 & 0 & (0 \cdot 0 = 0) & (0 + 0 = 0) & (\overline{0} = 1) \\ \hline 0 & 1 & (0 \cdot 1 = 0) & (0 + 0 = 0) & (\overline{0} = 1) \\ \hline 1 & 0 & (1 \cdot 0 = 0) & (1 + 0 = 1) & (\overline{1} = 0) \\ \hline 1 & 1 & (1 \cdot 1 = 1) & (1 + 1 = 1) & (\overline{1} = 0) \\ \hline \end{array} \] Step 4: Compare the derived truth table with the given options.
The derived truth table is:
\[ \begin{array}{|c|c|c|} \hline A & B & y \\ \hline 0 & 0 & 1 \\ \hline 0 & 1 & 1 \\ \hline 1 & 0 & 0 \\ \hline 1 & 1 & 0 \\ \hline \end{array} \] This matches the truth table provided in Option (2).
The final answer is \( \boxed{\text{Option (2)}} \).