A D flip-flop can be operated in toggle mode by connecting
- D and Q
- D and clock
- $Q^- \,and \,D $
- $Q \, and\, Q^-$
The Correct Option is C
Solution and Explanation
Top Questions on Flip-Flop
A 50 \(\Omega\) lossless transmission line is terminated with a load \( Z_L = (50 - j75) \, \Omega.\) { If the average incident power on the line is 10 mW, then the average power delivered to the load
(in mW, rounded off to one decimal place) is} _________.In the circuit shown below, the AND gate has a propagation delay of 1 ns. The edge-triggered flip-flops have a set-up time of 2 ns, a hold-time of 0 ns, and a clock-to-Q delay of 2 ns. The maximum clock frequency (in MHz, rounded off to the nearest integer) such that there are no setup violations is (answer in MHz).
- An ideal p-n junction germanium diode has a reverse saturation current of 10 \(\mu A\) at 300 K. The voltage (in Volts, rounded off to two decimal places) to be applied across the junction to get a forward bias current of 100 mA at 300 K is _________. (Consider the Boltzmann constant \( k_B = 1.38 \times 10^{-23} { J/K} \) and the charge of an electron \( e = 1.6 \times 10^{-19} { C} \).
In a 4-bit ripple counter, if the period of the waveform at the last flip-flop is 64 microseconds, then the frequency of the ripple counter in kHz is ___________. (Answer in integer)
- One example of the use of an S-R flip-flop is
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