Question

A 16-bit microprocessor has twenty address lines (A0 to A19) and 16 data lines. The higher eight significant lines of the data bus of the processor are tied to the 8-data lines of a 16 Kbyte memory that can store one byte in each of its 16K address locations. The memory chip should map onto contiguous memory locations and occupy only 16 Kbyte of memory space. Which of the following statement(s) is/are correct with respect to the above design?

• A. If the 16 Kbyte of memory chip is mapped with a starting address of 80000H, then the ending address will be 83FFFH.
• B. The active high chip-select needed to map the 16 Kbyte memory with a starting address at F0000H is given by the logic expression (A19 . A18 . A17 . A16).
• C. The 16 Kbyte memory cannot be mapped with contiguous address locations with a starting address as 0F000H using only A19 to A14 for generating chip select.
• D. The above chip cannot be interfaced as the width of the data bus of the processor and the memory chip differs.

Hint:

When calculating the address range for memory mapping, use the starting address and memory size to compute the ending address. Ensure that the chip-select logic expression matches the required address range.

Answer 1

The Correct Option is A, C

Step 1: Option (A)
The 16 Kbyte memory occupies 16K address locations, and since each address location holds one byte, the total memory size is 16 Kbytes. Starting from the address 80000H, the memory will span 16 Kbytes, so the ending address will be: \[ \text{Starting address} + \text{Size} - 1 = 80000H + 0x3FFF = 83FFFH. \] Thus, option (A) is correct.

Step 2: Option (B)
The chip-select signal logic expression is given by: \[ \text{Chip select} = A19 \cdot A18 \cdot A17 \cdot A16. \] However, this expression only works for selecting the proper address range when using the correct combination of address lines. This option is incorrect because the logic expression should involve other bits for correct chip selection.

Step 3: Option (C)
To map the 16 Kbyte memory, the memory requires at least 14 address bits (since \(2^{14} = 16K\)). The address lines from A19 to A14 cannot directly generate contiguous addresses for the memory space starting at 0F000H. This makes option (C) correct.

Step 4: Option (D)
The processor has a 16-bit data bus, and the memory chip uses 8 data lines. This is a valid configuration, so option (D) is incorrect.

Final Answer: (A), (C)