Which one of the following statements is true about the small signal voltage gain of a MOSFET based single stage amplifier?
Show Hint
- Common source and common gate amplifiers are both inverting amplifiers
- Common source and common gate amplifiers are both non-inverting amplifiers
- Common source amplifier is inverting and common gate amplifier is non-inverting amplifier
- Common source amplifier is non-inverting and common gate amplifier is inverting amplifier
The Correct Option is C
Solution and Explanation
The Common Gate (CG) configuration has its source as the input, drain as the output, and gate connected to ground (AC ground). The voltage gain here is positive, meaning it is a non-inverting amplifier.
Hence, the correct statement is:
Common source amplifier is inverting and common gate amplifier is non-inverting.
Top Questions on Electrical Circuits
The switch (S) closes at \( t = 0 \) sec. The time, in sec, the capacitor takes to charge to 50 V is _________ (round off to one decimal place).
- GATE EE - 2025
- Electrical Machines
- Electrical Circuits
The op-amps in the following circuit are ideal. The voltage gain of the circuit is __________(round off to the nearest integer).
- GATE EE - 2025
- Electrical Machines
- Electrical Circuits
In the system shown below, the generator was initially supplying power to the grid. A temporary LLLG bolted fault occurs at \( F \) very close to circuit breaker 1. The circuit breakers open to isolate the line. The fault self-clears. The circuit breakers reclose and restore the line. Which one of the following diagrams best indicates the rotor accelerating and decelerating areas?
- GATE EE - 2025
- Electrical Machines
- Electrical Circuits
The transformer connection given in the figure is part of a balanced 3-phase circuit where the phase sequence is “abc”. The primary to secondary turns ratio is 2:1. If \( I_a + I_b + I_c = 0 \), then the relationship between \( I_A \) and \( I_{ad} \) will be:
- GATE EE - 2025
- Electrical Machines
- Electrical Circuits
In the circuit shown below, if the values of \( R \) and \( C \) are very large, the form of the output voltage for a very high frequency square wave input is best represented by:
- GATE EE - 2025
- Electrical Machines
- Electrical Circuits
Questions Asked in GATE EE exam
A controller \( D(s) \) of the form \( (1 + K_D s) \) is to be designed for the plant \[ G(s) = \frac{1000\sqrt{2}}{s(s+10)^2} \] as shown in the figure. The value of \( K_D \) that yields a phase margin of \(45^\circ\) at the gain cross-over frequency of 10 rad/sec is __________ (round off to one decimal place).
- GATE EE - 2025
- Control Systems
Two units, rated at 100 MW and 150 MW, are enabled for economic load dispatch. When the overall incremental cost is 10,000 Rs./MWh, the units are dispatched to 50 MW and 80 MW respectively. At an overall incremental cost of 10,600 Rs./MWh, the power output of the units are 80 MW and 92 MW, respectively. The total plant MW-output (without overloading any unit) at an overall incremental cost of 11,800 Rs./MWh is ___________ (round off to the nearest integer).
Using shunt capacitors, the power factor of a 3-phase, 4 kV induction motor (drawing 390 kVA at 0.77 pf lag) is to be corrected to 0.85 pf lag. The line current of the capacitor bank, in A, is __________ (round off to one decimal place).
- GATE EE - 2025
- Electrical Energy, Power
Consider the state-space model
\[ \dot{\mathbf{x}}(t) = A \mathbf{x}(t) + B r(t), \quad y(t) = C \mathbf{x}(t) \]
where \( \mathbf{x}(t) \), \( r(t) \), and \( y(t) \) are the state, input, and output, respectively. The matrices \( A \), \( B \), and \( C \) are given below:
\[ A = \begin{bmatrix} 0 & 1 \\ -2 & -3 \end{bmatrix}, \quad B = \begin{bmatrix} 0 \\ 1 \end{bmatrix}, \quad C = \begin{bmatrix} 1 & 0 \end{bmatrix} \]
The sum of the magnitudes of the poles is __________ (round off to the nearest integer).An ideal low pass filter has frequency response given by \[ H(j\omega) = \begin{cases} 1, & |\omega| \leq 200\pi \\ 0, & \text{otherwise} \end{cases} \] Let \( h(t) \) be its time domain representation. Then h(0) = _________ (round off to the nearest integer).
- GATE EE - 2025
- Electrical Energy, Power