Step-by-step logic gate analysis:
Inputs:
- Top AND gate: \(1 \cdot 0 = 0\)
- Bottom OR gate: \(0 + 1 = 1\)
Middle OR gate: Inputs = (Output of AND = 0, Output of OR = 1)
\[
0 + 1 = 1
\]
That goes to a NOT gate → Output = \(0\)
Next AND gate: Inputs = (Output of AND = 0, Output of NOT = 0)
\[
0 \cdot 0 = 0 \Rightarrow Y = 1 \text{ (since connected to inverted NOT logic from input)}
\]
Final OR gate: Inputs = (Output from OR = 1, Output of previous AND = 0)
\[
1 + 0 = 1 \Rightarrow Z = 1
\]