Question

In an instruction execution pipeline, the earliest that the instruction TLB and data TLB can be accessed are:

• A. Fetch stage and fetch stage respectively
• B. Fetch stage and memory stage respectively
• C. Memory stage and execute stage respectively
• D. Memory stage and memory stage respectively

Hint:

In pipeline architecture, the stages of fetching and executing instructions define when the data and instruction caches (like TLB) are accessed.

Answer 1

The Correct Option is B

In an instruction execution pipeline, the TLB (Translation Lookaside Buffer) stores the most recently used address translations for faster access. - The instruction TLB is accessed during the fetch stage, where the instruction is fetched from memory. - The data TLB is accessed during the memory stage, where the data associated with the instruction is being accessed. Thus, the earliest that the instruction TLB and data TLB can be accessed are in the fetch stage and memory stage, respectively. Thus, the correct answer is \( \boxed{(b)} \).