Question:

In an extrinsic p-type semiconductor, which of the following schematic diagram depicts the variation of the Fermi energy level (EF) with temperature (T) ?

Updated On: Nov 18, 2025
  • schematic diagram 1
  • Schematic Diagram 2
  • Schematic Diagram 3
  • Schematic Diagram 4
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The Correct Option is A

Solution and Explanation

To determine the correct schematic diagram that depicts the variation of the Fermi energy level (E_F) with temperature (T) in an extrinsic p-type semiconductor, we must understand how Fermi energy behaves in such materials.

Understanding Extrinsic p-Type Semiconductor:

  • An extrinsic p-type semiconductor has an abundance of holes as the majority charge carriers.
  • This is typically achieved by doping a pure semiconductor with an acceptor impurity which introduces more holes than electrons.
  • At absolute zero, the Fermi level is located near the valence band; as the temperature increases, the Fermi level shifts toward the middle of the energy gap.

Temperature Variation:

  • For p-type semiconductors at low temperatures, E_F is closer to the valence band.
  • As temperature rises, thermally generated carriers lead to E_F moving slightly upwards towards the intrinsic level because the band gap effectively narrows.

Identifying the Correct Schematic:

Among the provided diagrams, the one that correctly shows E_F starting closer to the valence band and moving towards the center of the band gap with an increase in temperature is the correct representation.

schematic diagram 1

This image accurately reflects the behavior of E_F in an extrinsic p-type semiconductor with temperature change.

Conclusion:

The Fermi level in an extrinsic p-type semiconductor will shift from near the valence band towards the middle of the energy gap as temperature increases. Therefore, the correct schematic diagram is Option 1.

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