The ideal voltage gain \( A_V \) of a JFET is given by the formula:
\(A_V = g_m \times R_D\)
Where:
Given:
Now, substitute these values into the formula to find the voltage gain:
\(A_V = (4 \times 10^{-3}) \times (1.5 \times 10^3) = 6\)
Conclusion: The ideal voltage gain \( A_V \) is 60.
Assuming in forward bias condition there is a voltage drop of \(0.7\) V across a silicon diode, the current through diode \(D_1\) in the circuit shown is ________ mA. (Assume all diodes in the given circuit are identical) 


For the given logic gate circuit, which of the following is the correct truth table ? 