raises the potential barrier.
reduces the majority carrier current to zero.
lowers the potential barrier.
None of the above.
The correct statement is (C): Lowers the potential barrier
When a forward bias is applied to a p-n junction, it lowers the value of potential barrier. In the case of a forward bias, the potential barrier opposes the applied voltage. Hence, the potential barrier across the junction gets reduced.
Assuming in forward bias condition there is a voltage drop of \(0.7\) V across a silicon diode, the current through diode \(D_1\) in the circuit shown is ________ mA. (Assume all diodes in the given circuit are identical) 


For the given logic gate circuit, which of the following is the correct truth table ? 