Question

A certain processor uses a fully associative cache of size 16 kB. The cache block size is 16 bytes. Assume that the main memory is byte addressable and uses a 32-bit address. How many bits are required for the Tag and the Index fields respectively in the addresses generated by the processor?

• A. 24 bits and 0 bits
• B. 28 bits and 4 bits
• C. 24 bits and 4 bits
• D. 28 bits and 0 bits

Hint:

For a {fully associative cache}: Index bits are always {0}. Tag bits $=$ Address bits $-$ Offset bits.

Answer 1

The Correct Option is D

Step 1: Understand cache parameters.
Cache size $= 16$ kB $= 16 \times 1024 = 2^{14}$ bytes
Block size $= 16$ bytes $= 2^4$ bytes
Main memory address size $= 32$ bits
Step 2: Determine the number of cache blocks.
\[ \text{Number of cache blocks} = \frac{2^{14}}{2^4} = 2^{10} \] Step 3: Find the number of offset bits.
Since the memory is byte addressable and block size is $16$ bytes: \[ \text{Block offset bits} = \log_2 16 = 4 \text{ bits} \] Step 4: Determine index bits.
The cache is fully associative.
In a fully associative cache, there is no index field because any memory block can be placed in any cache block.
\[ \text{Index bits} = 0 \] Step 5: Calculate tag bits.
Address is divided as: \[ \text{Tag} + \text{Index} + \text{Offset} = 32 \text{ bits} \] Substitute known values: \[ \text{Tag} = 32 - 0 - 4 = 28 \text{ bits} \] Step 6: Conclusion.
The number of bits required for the Tag and Index fields are: \[ \boxed{28 \text{ bits and } 0 \text{ bits}} \]